Design with testability for a platform-based SoC design methodology

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) Pub Date : 1999-08-23 DOI:10.1109/APASIC.1999.824090

W. Ke, Khoan Truong

引用次数: 7

Abstract

This paper describes a design-for-testability (DFT) methodology for an application-oriented platform-based design environment, which reuses test-ready virtual components (VCs) and integrates them using a set of predefined guidelines and practices. We focus on introducing the concept of the proposed methodology with examples for demonstrating some of the techniques and issues.

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基于平台的SoC设计方法的可测试性设计

本文描述了面向应用的基于平台的设计环境的可测试性设计(DFT)方法，该方法重用可测试的虚拟组件(vc)，并使用一组预定义的指导方针和实践来集成它们。我们将重点介绍所建议的方法的概念，并举例说明一些技术和问题。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)

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