System testability evaluation with STA

W. Maroufi, M. Marzouki
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Abstract

This paper presents a Computer Aided Testability tool named STA (System Testability Assistant), aimed at proposing a testability strategy for systems as early as possible in the design process. Given a system description, STA first compiles it in order to create system, boards, and circuits objects, and then proceeds bottom-up, from the circuit to the system, in order to evaluate the actual testability of the whole system, recommend a testability strategy and testability features inclusion in some modules, and provides support for including these testability features in the system by calling external generators or synthesis for testability tools.
基于STA的系统可测试性评估
本文提出了一种计算机辅助可测试性工具STA (System teststability Assistant),旨在尽早在设计过程中提出系统的可测试性策略。给定系统描述,STA首先对其进行编译,以创建系统、电路板和电路对象,然后自下而上,从电路到系统,以评估整个系统的实际可测试性,推荐可测试性策略和包含在某些模块中的可测试性特性,并通过调用外部生成器或可测试性工具的合成来支持将这些可测试性特性包含在系统中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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