A 0.5-14-GHz 10.6-dB CMOS cascode distributed amplifier

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408) Pub Date : 2003-06-12 DOI:10.1109/VLSIC.2003.1221183

Ren-Chieh Liu, Chin-Shen Lin, K. Deng, Huei Wang

引用次数: 114

Abstract

A 0.5-14-GHz distributed amplifier (DA) using 0.18-/spl mu/m CMOS technology has been presented. It demonstrates the highest gain bandwidth product reported for a CMOS amplifier using a standard Si-based IC process. This DA chip achieves measured results of 10.6/spl plusmn/0.9 dB gain, NF between 3.4 and 5.4 dB with good return losses better than from 0.5 to 14 GHz. The measured output IP3 and P/sub ldB/ are +20 dBm and +10 dBm, respectively, from 2 to 10 GHz.

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一种0.5- 14ghz 10.6 db CMOS级联编码分布式放大器

提出了一种采用0.18-/spl μ m CMOS技术的0.5- 14ghz分布式放大器(DA)。它演示了使用标准硅基集成电路工艺的CMOS放大器的最高增益带宽产品。该数据分析芯片的测量结果为10.6/spl plusmn/0.9 dB增益，NF在3.4 ~ 5.4 dB之间，回波损耗优于0.5 ~ 14 GHz。在2 ~ 10 GHz范围内，测量输出IP3和P/sub ldB/分别为+20 dBm和+10 dBm。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)

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