Modified Tent Map Based Design for True Random Number Generator

Abstract

This paper introduces design and implementation of True Random Number Generator (TRNG) based on discrete time chaos map, which uses two chaotic maps to avoid the limitation of lesser entropy generated using single chaotic map based TRNG and offset error of the current mirror as well as the mismatch of transistor for enhanced randomness. The proposed architecture is implemented considering two modified tent map (MTM) together with different design of sample and hold (S/H) and comparator circuits. The design utilizes less resources yielding hardware redundancy and also enhances the level of randomness. This TRNG have been designed and validated using 180nm CMOS technology in cadence virtuoso tool. Power dissipation and speed have been obtained as 2.4mW and 50Mbps respectively. The generated random bit stream have also been sampled and converted to binary format in MATLAB and tested through NIST 800.22 statistical test suite for validation. The proposed design pass efficiency is more than 90%.