A PCI-compatible FPGA-coprocessor for 2D/3D image processing

G. Knittel
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引用次数: 21

Abstract

We present a small-scale FPGA-coprocessor board for PCI-based systems. It features one XC3195A FPGA (<9 K gate equivalents), three XC4013 devices (each up to 13 K gate equivalents), 2 MByte of Flash Memory, 256 KByte of high-speed SRAM and a 16-bit high-speed multiply-and-accumulate unit. The board was designed to speed up algorithms from scientific visualization, in particular the visualization of 3D-datasets. Such algorithms show a large number of short integer or bit operations, which can efficiently be off-loaded from the CPU to an FPGA-coprocessor. Although being exactly tailored to our application, the accelerator constitutes a versatile platform for other algorithms from image or speech processing. The PCI-bus provides the necessary transfer bandwidth for dataflow-intensive computations.
用于2D/3D图像处理的pci兼容fpga协处理器
我们提出了一种用于基于pci的系统的小型fpga协处理器板。它具有一个XC3195A FPGA (<9 K栅极等效),三个XC4013器件(每个器件高达13 K栅极等效),2 MByte闪存,256 KByte高速SRAM和16位高速乘法和累加单元。该板旨在加速科学可视化的算法,特别是3d数据集的可视化。这种算法显示了大量的短整数或位运算,可以有效地从CPU卸载到fpga协处理器。虽然是为我们的应用量身定制的,但加速器为图像或语音处理等其他算法提供了一个通用的平台。pci总线为数据流密集型计算提供必要的传输带宽。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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