Magnetic memories: From DRAM replacement to ultra low power logic chips

G. Prenat, G. D. Pendina, Christophe Layer, O. Goncalves, K. Jaber, B. Dieny, R. Sousa, I. Prejbeanu, J. Nozieres
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引用次数: 1

Abstract

The recent advent of spin transfer torque (STT) has shed a new light on MRAM with the promises of much improved performances and greater scalability to very advanced technology nodes. As a result, MRAM is now viewed as a credible solution for stand-alone and embedded applications where the combination of non-volatility, speed and endurance is key. Whereas the technology is nearing maturity for DRAM replacement, with the exception of process scaling to sub-20nm which remains a challenge, circuit designers are now actively looking at SoCs where MRAM could bring in better performance and lower power consumption in data intensive applications as well as instant-on capability in mobile applications. In this paper we present a review of the MRAM technology and a methodology for ASIC design using a custom full digital hybrid CMOS/Magnetic Process Design Kit. We finish by a few examples showing that magnetic memories can be efficiently integrated in logic designs, for both safety and low power purposes.
磁存储器:从DRAM替代品到超低功耗逻辑芯片
最近出现的自旋传递扭矩(STT)为MRAM带来了新的亮点,它有望大大提高性能,并在非常先进的技术节点上具有更大的可扩展性。因此,MRAM现在被视为独立和嵌入式应用的可靠解决方案,在这些应用中,非易失性、速度和耐用性是关键。虽然替代DRAM的技术已经接近成熟,但制程扩展到20nm以下仍然是一个挑战,电路设计人员现在正在积极研究MRAM可以在数据密集型应用中带来更好性能和更低功耗的soc,以及在移动应用中的瞬时启动能力。在本文中,我们介绍了MRAM技术的回顾和使用定制的全数字混合CMOS/磁性工艺设计套件进行ASIC设计的方法。最后,我们举例说明磁记忆体可以有效地整合到逻辑设计中,以达到安全和低功耗的目的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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