Device performance improvement with implantation balancing energy contamination and productivity

2016 16th International Workshop on Junction Technology (IWJT) Pub Date : 2016-05-09 DOI:10.1109/IWJT.2016.7486672

Yonggen He, G. Cai, Zuyuan Zhou, Youfeng He, Jingang Wu, David-Wei Zhang, Ting Cai, Junfeng Lu, Ganming Zhao, B. Guo

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Abstract

Ion implantation technology is widely used in semiconductor manufacturing process. Most of install base for high current implanters use deceleration technology to overcome space charge effect especially important for low energy implants. It is necessary to consider the Energy contamination (EC) effects on devices with thinner gate height. This paper use SRIM simulation and dopant profiles, offline sheet resistance to illustrate the selection of deceleration by considering EC tails beyond the gate height. The device effects using p-type Poly (PPoly) and Source Drain (PSD) implant steps are evaluated in state of art 28nm device flow. The device performance can gain 6% with optimized implant conditions. It demonstrated the necessary of balance device requirement and productivity using implanters with deceleration technologies. The newer generation implanters with EC filter technology, providing maximum productivity while meeting device requirement, was discussed briefly also.

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通过植入平衡能量污染和生产效率来改善设备性能

离子注入技术广泛应用于半导体制造工艺中。大电流种植体的安装底座大多采用减速技术来克服空间电荷效应，特别是在低能量种植体中。对于栅极高度较薄的器件，有必要考虑能量污染(EC)的影响。本文利用SRIM仿真和掺杂物剖面、脱机片材电阻来说明考虑栅极高度以外EC尾的减速选择。使用p型聚(PPoly)和源漏(PSD)植入步骤的器件效果在最先进的28nm器件流中进行评估。在优化的植入条件下，器件性能可提高6%。论证了采用减速技术的种植机对平衡装置的要求和生产效率的必要性。并简要讨论了采用EC过滤技术的新一代种植机在满足设备要求的同时提供最大的生产效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2016 16th International Workshop on Junction Technology (IWJT)

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