A time-interleaved continuous-time /spl Delta//spl Sigma/ modulator with 20MHz signal bandwidth

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI:10.1109/ESSCIR.2005.1541656

T. Caldwell, D. Johns

引用次数: 13

Abstract

This paper presents the first implementation results for a time-interleaved continuous-time /spl Delta//spl Sigma/ modulator. The 3rd-order low-pass modulator operates at an oversampling ratio of 5 with a time-interleaving factor of 2 at sampling frequencies of 100MHz and 200MHz. It achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.

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具有20MHz信号带宽的时间交错连续时间/spl δ //spl σ /调制器

本文给出了时间交错连续时间/spl δ //spl σ /调制器的第一个实现结果。三阶低通调制器在100MHz和200MHz采样频率下的过采样比为5，时间交错因子为2。在10MHz和20MHz的信号带宽下，SNDR分别达到57dB和49dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.

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