Back-annotation of gate-level power properties into system level descriptions

Abstract

It is important to accurately estimate power consumption in early stages of the design in order to avoid costly redesign. System level design consists of defining transaction level (TL) communications between various components that can be either processors or cores described at system level using high level languages such as SystemC. An important component of a design at the system level is a processor, the accurate power estimation of which is necessary. In this paper we propose a new power estimation method with high accuracy and relatively fast simulation for general purpose processors. The average accuracy achieved is about 90% while the performance is better than the state-based estimation methods. Our proposed method is a hybrid method which uses the concepts of instruction-based, state-based and activity-based power estimation.