System on Chip Implementation of Compiler Stack with a Delimiter Matching Application

Abstract

In this paper, multiple stacks are implemented in software and multi-core hardware System on Chip for suitability and improvement of performance speed. The hardware stacks are tested with the application of delimiter matching in a program and they showed faster run time compared to the software-based stacks. The implemented design of 16 programmable logic cores on the Xilinx Zynq-7000 chip located on the Zybo board has achieved a run time of 13.9ms when applying a matching delimiter test on a code of 16 random equations written in C language.