A design methodology for low EMI-noise microprocessor with accurate estimation-reduction-verification

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012822

Hiroyulu Tsujikawa, K. Shimazaki, S. Hirano, Motohiro Ohki, Talcashi Yoneda, Hiroshi Benno

引用次数: 3

Abstract

The main objective of our work is to develop a fast and accurate total solution for dramatically reducing electromagnetic interference (EMI) noise in high-performance LSI microchips at the design stage through unifying estimation, reduction, and verification. This innovative methodology has been proven in the successful design of a 32-bit microprocessor with very low EMI noise.

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一种具有精确估计-降低-验证的低emi噪声微处理器设计方法

我们工作的主要目标是开发一种快速准确的整体解决方案，通过统一的估计，减少和验证，在设计阶段显着降低高性能LSI微芯片中的电磁干扰(EMI)噪声。这种创新的方法已经在一个具有非常低EMI噪声的32位微处理器的成功设计中得到了证明。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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