Design and Analysis of VCO in PLL System

Abstract

A wide-bandwidth low-noise VCO used in PLL system was investigated, including a harmonic filtering resistor and source damping resistors to reduce the phase noise and power dissipation. The back-to-back varactor topology is identified as a suitable solution to linearize the tank capacitance. The amplitude to phase noise conversion is greatly attenuated. The circuit was simulated using 0.35um CMOS technology in Mentor Graphics Eldo-RF environment, the simulation results show that the phase noise of the oscillator can reach -119.5dBc/Hz@1MHz, the power dissipation is 3.0mw at 2.4GHz.