Characterization of a CMOS current-steering DAC using state-space models

Abstract

Performance limitations on current-steering digital-to-analog converters (DACs) are due to finite output impedances, nonideal switches, parasitic capacitances, matching, etc. In this work we present a dynamic state-space model of a 14-bit current-steering DAC which includes dynamic nonidealities. Simulation results are presented and compared to measurement results. The model can be used for fast performance estimation of D/A converters.