A high-input-impedance buffer

Abstract

A circuit diagram and an equivalent circuit of high-input-impedance buffer stage with bootstrapped input biasing resistor and power supply nodes are given. The efficiencies of the bootstrapping of the input biasing resistor and the power supply nodes are simulated in the equivalent circuit. The analysis of the equivalent circuit of the buffer leads to a set of equations for calculation of the voltage gain and the input impedance. Experimental results show the expected very high input impedance of the buffer.