AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based design exploration

Abstract

In order to overcome the ever increasing complexity of digital circuits, system design at the Electronic System Level (ESL) has become an area of active research. SystemC provides designers with a readily-available ESL framework, allowing them to design mixed hardware/software systems using a standardized C++ library. The analysis of the resulting designs is crucial to e.g. apply additional validation steps or assist designers during the development process. Existing approaches focus on the extraction of static information, providing designers with models that describe the structure of their system but not its behavior. In this paper, we introduce the Automated Intra-cycle Behavioral Analysis tool, AIBA. AIBA utilizes the GNU debugger to execute a two-step analysis that retrieves behavioral and architectural information of ESL designs. The proposed method is completely non-intrusive, allowing both SystemC designs and the standard tool flow to be used without any modification. Case studies confirm the benefits of the approach.