{"title":"X-band successive detection log amplifier/limiter MMIC implemented in 0.15 /spl mu/m double recess PHEMT","authors":"J. Komiak, W. Kong, K. Nichols","doi":"10.1109/GAAS.2002.1049058","DOIUrl":null,"url":null,"abstract":"Design and performance of an X-band successive detection log amplifier/limiter MMIC covering 8 to 12 GHz is reported. The three-stage amplifier is a cascadeable block providing 20 dB nominal gain, 5.5 dB noise figure, +7 dBm limited output, < 2:1 input/output VSWR, and a 20 dB log range at 50 mV/dB. This is the first reported use of successive detection at X-band frequencies. Previously reported results have been below 7 GHz, required four times the power for the same dynamic range, and twice the chip count. The amplifier is implemented in a fully selective 0.15 /spl mu/m double recess power PHEMT process.","PeriodicalId":142875,"journal":{"name":"24th Annual Technical Digest Gallium Arsenide Integrated Circuit (GaAs IC) Symposiu","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"24th Annual Technical Digest Gallium Arsenide Integrated Circuit (GaAs IC) Symposiu","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.2002.1049058","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Design and performance of an X-band successive detection log amplifier/limiter MMIC covering 8 to 12 GHz is reported. The three-stage amplifier is a cascadeable block providing 20 dB nominal gain, 5.5 dB noise figure, +7 dBm limited output, < 2:1 input/output VSWR, and a 20 dB log range at 50 mV/dB. This is the first reported use of successive detection at X-band frequencies. Previously reported results have been below 7 GHz, required four times the power for the same dynamic range, and twice the chip count. The amplifier is implemented in a fully selective 0.15 /spl mu/m double recess power PHEMT process.