Power awareness for multi-voltage island X-clock tree construction with double-via insertion

Abstract

This paper proposes an algorithm to construct an X-clock tree with double via insertion that connects several voltage islands for power minimization. We first construct the X-clock tree for each voltage island and make double via insertion for this tree to improve yield and reliability. Then we combine these X-clock trees based on a well-defined connection with inserted level shifters to reduce power. The delay effect due to total number of vias is also accounted. Experimental results show that X-clock tree based on multi-voltage islands has 22.46% and 5.41% respectively in power and delay less than that of single voltage island.