Global routing with crosstalk constraints

Abstract

Due to the scaling down of device geometry and increasing frequency in deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem.