Design of irregular LDPC Codes for flexible Encoder and Decoder Hardware Realization

Abstract

Low-density parity-check (LDPC) codes are among the best channel codes known today and are in discussion for current and future communications standards. LDPC codes can be efficiently modeled by Tanner-graphs. In this paper, we present a novel hardware-efficient 2-vector design method of such graphs. We show communications performance results for an exemplary code created by this approach and corresponding implementation results for a flexible, multi-rate 2V-LDPC decoder and encoder applicable for hybrid-ARQ