60 GHz low noise amplifiers with 1 kV CDM protection in 40 nm LP CMOS

Abstract

This paper describes a set of miniature, three-stage 60 GHz LNAs designed in 40 nm LP CMOS. The designs prove effectiveness and ease of use of inductor-based ESD protection schemes applied to mm-wave circuits. The measured ESD protection levels reach 4.5 kV HBM, up to 7.6 A for VFTLP tests and a record of 1 kV CDM. At the same time, the NF of the LNAs is below 8 dB and the gain above 15 dB at 60 GHz, all at 1.1 V supply. These circuits can effectively be used as input stages of a phased array receiver.