The design and technology requirements of a 9-channel RS485 transceiver for ultra-SCSI applications

Proceedings of Bipolar/Bicmos Circuits and Technology Meeting Pub Date : 1995-10-02 DOI:10.1109/BIPOL.1995.493886

M. Corsi, E. Suder, J. Tran, L. Hutter, J.P. Smith, L. Springer

引用次数: 0

Abstract

The design aspects of a 9-channel ultra-SCSI transceiver chip are discussed including improvements to speed, power consumption and die size over a previous generation chip, Discussion of the enabling linear BiCMOS technology and an ESD strategy, critical to the function of this class of chip, are presented. Finally, the results of prototype silicon are reviewed.

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超scsi应用的9通道RS485收发器的设计和技术要求

讨论了9通道超scsi收发器芯片的设计方面，包括比上一代芯片在速度、功耗和芯片尺寸方面的改进，并讨论了实现线性BiCMOS技术和ESD策略，这对该类芯片的功能至关重要。最后，对原型硅的研究结果进行了综述。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of Bipolar/Bicmos Circuits and Technology Meeting

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