Using LCSS algorithm for circuit level verification of analog designs

Abstract

This paper relies on the longest closest subsequence (LCSS), a variant of the longest common subsequence (LCS), to account for process variation and mismatch in analog circuits. At circuit level, the effect of mismatch and process variation that results in offsets is analyzed by performing parametric and statistical techniques and then applying LCSS to estimate the probability of closest matching. The acceptance/rejection of a circuit is done using bounded hypothesis testing. The approach is illustrated on a Rambus ring oscillator circuit for a 90nm fabrication process. Advantages of the proposed methods are robustness and flexibility to account for a wide range of variations.