A study on using pulse generators to design a ring-VCO based bang-bang PLL/CDR with a consistent loop bandwidth

Abstract

A technique making the loop bandwidth consistent against PVT variations in the ring-VCO based bang-bang PLL/CDR is proposed. Pulse generators are used to implement this technique by cancelling out PVT sensitivity of the ring-VCO. Simulation results show that the loop bandwidth variation is reduced by half with the proposed technique. Also, by using the pulse generators, the loop filter capacitor area is reduced.