Low -Warpage Encapsulants for Wafer Level Packaging

Abstract

Wafer level encapsulation has become increasingly important to build up components for mobile and high-performance computing applications. Ranging from system-in-package and antenna modules to high band-width memory device, many of those wafer-level applications demand new features from encapsulant materials. Besides to provide mechanical protection, new wafer-level encapsulants are preferred to bring in extra features: a) reducing package warpage during wafer-level processing; b) being EU REACH compliant, c) showing excellent flowability for trench-fill or gap-fill. In our new material development, these new features can be achieved in a new type of filled epoxy system. The new class of encapsulants maintains high glass transition temperature (Tg), at the same level of typical semiconductor encapsulants, while demonstrating low-warpage during the wafer-level process, an estimation of more than 50% improvement from typical encapsulants. Owing to the use of fine fillers and new resin chemistry, fine gap-filling is possible. Combination of low-warpage and good flowability allows us to serve better in wafer-level applications. Some case studies will be discussed, including: 1) using liquid compression molding (LCM) process to encapsulate the wafers that have built-in trench-gaps, fine-gaps, or solder-bumps. 2) using stencil printing process to encapsulate trenched wafers. In both process routes, low-warpage, void-free gap-fill can be achieved from the packages. Moreover, the encapsulated test-vehicles passed JEDEC MSL-1 reliability conditions. The results demonstrated that this new wafer-level encapsulants have the potential to meet the growing demands from various wafer-level applications.