Eshel Haritan, T. Hattori, Hiroyuki Yagi, P. Paulin, W. Wolf, A. Nohl, D. Wingard, M. Muller
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引用次数: 13
Abstract
Multi Processor SoC (MPSoC) are being designed today. MPSoC design can help achieve aggressive performance and low power targets but it creates new design challenges: How to design the interconnect fabric and memory sub-system to allow the massive data movement required in a multi processor SoC environment? How to develop, debug and verify HW and SW functionality in a MPSoC design? Is MPSoC design an inflection point that will require new design methods including ESL methodologies?