100 Gbit/s optical transport network 40 nm test chip design and prototyping

Abstract

This work reports the design and prototyping of a 100 Gbit/s OTN 40 nm test chip, manufactured as a test vehicle strategy for an OTN processor device under development at CPqD for the Brazilian telecom industry. The main issues related to the integration of third-party silicon intellectual property solutions are covered, together with the evaluation environment where the test chip was successfully validated.