A 65 nm CMOS - Stacked Folded Fully Differential (SFFD) PA structure for W-CDMA application

Y. Luque, N. Deltimple, E. Kerhervé, D. Belot
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引用次数: 4

Abstract

This paper presents a 65 nm CMOS-power amplifier (PA) designed for mobile communications.The PA is based on a new structure, the stacked folded fully differential (SFFD) which is inspired by a push-pull structure. The PA is designed for the UMTS W-CDMA standard which requires linearity from -20 dBm to 24 dBm output power. The power amplifier provides 31 dBm output power with 26% of power added efficiency (PAE) at 1.95 GHz. The linear gain is 20 dB and the compression point (OCP1) is 25.6 dBm. In order to meet the UMTS W-CDMA requirements, the PA is linear until 24 dBm, which is the maximum output power required by this standard.
一种用于W-CDMA的65nm CMOS堆叠折叠全差分(SFFD) PA结构
提出了一种用于移动通信的65nm cmos功率放大器。PA基于一种新的结构,堆叠折叠全差动(SFFD),其灵感来自于推拉结构。该放大器专为UMTS W-CDMA标准而设计,该标准要求输出功率从-20 dBm到24 dBm的线性度。功率放大器在1.95 GHz时提供31 dBm输出功率,功率附加效率(PAE)为26%。线性增益为20 dB,压缩点(OCP1)为25.6 dBm。为了满足UMTS W-CDMA的要求,PA在24 dBm之前是线性的,这是该标准所要求的最大输出功率。
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