Processing module of FFT in monolithic single-chip MEMS

Abstract

Developing efficient computation of FFT using cyclic convolutions for size the integer power of two is considered. The structures of basis matrices of DFT are presented via the hashing arrays. The interconnection of the structures or hashing arrays of DFT for the sizes the integer powers of two is determined. Proposed left-circulant components of structure are suitable for applying in monolithic single-chip MEMS+ASIC.