A 1.9 GHz-band ultra low power consumption amplifier chip set for personal communications

M. Muraguchi, M. Nakatsugawa, H. Hayashi, M. Aikawa
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引用次数: 20

Abstract

An ultra low power consumption amplifier chip set for the 1.9 GHz Japanese Personal Handy-phone System (PHS) is presented. The chip set includes a linear power amplifier, a driver amplifier, and an LO switch amplifier. These amplifiers use Cascode FETs that provide low phase distortion, high gain, and low current operation. The power amplifier uses a new concept of a self-phase distortion compensation to achieve a record performance of 45% power added efficiency with sufficient linearity. The driver amplifier has a gain of 13.5 dB with a low power consumption of 3 mW (1 mA, 3 V). The LO switch amplifier is a new MMIC that has both switch and buffer amplifier functions. The switch amplifier has an output power of 3 dBm, a forward gain of 15 dB, and a reverse isolation of 35 dB with a low power consumption of 6 mW (2 mA, 3 V).<>
用于个人通信的1.9 ghz频段超低功耗放大器芯片组
介绍了一种适用于1.9 GHz日本个人手持电话系统(PHS)的超低功耗放大器芯片组。该芯片组包括线性功率放大器、驱动放大器和LO开关放大器。这些放大器使用级联码场效应管,提供低相位失真,高增益和低电流操作。该功率放大器采用了自相位失真补偿的新概念,在充分的线性度下实现了创纪录的45%的功率附加效率。驱动放大器的增益为13.5 dB,功耗为3 mW (1 mA, 3 V)。LO开关放大器是一种新型MMIC,具有开关和缓冲放大器功能。该开关放大器的输出功率为3 dBm,正向增益为15 dB,反向隔离为35 dB,低功耗为6 mW (2 mA, 3 V)。
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