A low power MPEG-2 decoder chip-set for set-top box

Proceedings of International Conference on Consumer Electronics Pub Date : 1995-06-07 DOI:10.1109/ICCE.1995.517977

Y. Mogi, H. Sasaki, T. Ishikawa, T. Sasaki, L. Sugimoto, E. Yamauchi, N. Ozaki, T. Fukuda, H. Koyanagi, H. Sumihiro, S. Emoto, A. Moroboshi

引用次数: 2

Abstract

An extremely low power MPEG-2 decoder chipset, requiring only +3.3 volt power supply, has been developed. We have designed the chip-set with various functionalities to be easily integrated into set-top boxes and other digital applications.

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用于机顶盒的低功耗MPEG-2解码器芯片组

已经开发出一种极低功耗的MPEG-2解码器芯片组，仅需+3.3伏电源。我们设计的芯片组具有各种功能，可以轻松集成到机顶盒和其他数字应用程序中。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of International Conference on Consumer Electronics

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