Design of a low power ECG signal processor for wearable health system-review and implementation issues

Abstract

The paper presents a low power ECG signal processing ASIC chip design to extract the ECG features for wearable health system. The new design is used for the diagnosis of ECG arrhythmia based on features. The design consists of an acquisition unit, analog to digital conversion, pre-processing stage and feature extraction stage. The proposed design is advantage as it acquires both analog and digital ECG data. In addition to that the power consumed is less and area occupied is optimum. The proposed ASIC is designed using 90nm Technology.