Reconfigurable architecture for lifting based discrete wavelet transform

Abstract

the DWT, less memory requirements, symmetric forward and inverse transform, etc[2,3]. Abstract In this paper a novel reconfigurable hardware accelerator for the lifting scheme algorithm is presented. The design is pipelined, scalable and can be easily configured for use of different filter. The lifting scheme has gained a special interest for efficient computation of the Discrete Wavelet Transform (DWT). The reconfigurability of hardware architectures has been a key word to meet different application requirement. Significant results were obtained in terms of throughput and area occupation.