{"title":"Internal Reference Compensation Technique for Constant On-time Buck Converter with Ceramic Capacitor","authors":"Pang-Jung Liu, Chih-Hung Wang, Mao-Hui Kuo, Xin-Wei Huang","doi":"10.23919/IPEC-Himeji2022-ECCE53331.2022.9807231","DOIUrl":null,"url":null,"abstract":"A ripple-based constant on-time (COT) buck converter with an additional current feedback path (ACFP) technique can relax the need of large equivalent series resistance (ESR) at the output capacitor. However, output regulation accuracy is degraded due to the output dc offset. Thus, this paper proposes an internal reference compensation (IRC) technique to enhance converter stability with ceramic capacitor while removing the load-dependent dc offset voltage on the output voltage. A test chip fabricated in 0.35-μm CMOS technology has demonstrated the validation of IRC technique. The experimental results show that the output voltage ripple is 3 mV and output dc offset can be eliminated while the transient recovery time is 4μs for load current change of 450 mA,","PeriodicalId":256507,"journal":{"name":"2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IPEC-Himeji2022-ECCE53331.2022.9807231","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A ripple-based constant on-time (COT) buck converter with an additional current feedback path (ACFP) technique can relax the need of large equivalent series resistance (ESR) at the output capacitor. However, output regulation accuracy is degraded due to the output dc offset. Thus, this paper proposes an internal reference compensation (IRC) technique to enhance converter stability with ceramic capacitor while removing the load-dependent dc offset voltage on the output voltage. A test chip fabricated in 0.35-μm CMOS technology has demonstrated the validation of IRC technique. The experimental results show that the output voltage ripple is 3 mV and output dc offset can be eliminated while the transient recovery time is 4μs for load current change of 450 mA,