A high-linearity, LC-Tuned, 24-GHz T/R switch in 90-nm CMOS

Piljae Park, Dong-Hun Shin, J. Pekarik, M. Rodwell, C. Yue
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引用次数: 12

Abstract

This paper presents an LC-tuned, 24-GHz single-pole double-throw (SPDT) transmit/receive (T/R) switch implemented in 90-nm CMOS. The design focuses on the techniques to increase the power handling capability in the transmit (Tx) mode under 1.2-V operation. The switch achieves a measured P-1dB of 28.7 dBm, which represents the highest linearity, reported to date, for CMOS millimeter-wave T/R switches. The transmit and receive (Rx) branches employ different switch topologies to minimize the power leakage into the Rx path during Tx mode, and hence improve the linearity. To accommodate large signal swing, AC floating bias is applied using large bias resistors to all terminals of the switch devices. Triple-well devices are utilized to effectively float the substrate terminals. The switch uses a single 1.2-V digital control signal for T/R mode selection and for source/drain bias. The measured insertion loss is 3.5 dB and return loss is better than -10 dB at 24 GHz.
90nm CMOS高线性,lc调谐,24ghz T/R开关
本文提出了一种lc调谐,在90纳米CMOS中实现的24 ghz单极双掷(SPDT)发射/接收(T/R)开关。设计的重点是提高1.2 v工作下传输(Tx)模式下的功率处理能力的技术。该开关实现了28.7 dBm的测量P-1dB,这代表了迄今为止CMOS毫米波T/R开关的最高线性度。发射和接收(Rx)分支采用不同的开关拓扑结构,以尽量减少在Tx模式期间泄漏到Rx路径的功率,从而提高线性度。为了适应大的信号摆动,在开关设备的所有端子上使用大的偏置电阻施加交流浮动偏置。三孔装置用于有效地漂浮基板端子。开关使用单个1.2 v数字控制信号进行T/R模式选择和源/漏偏置。在24 GHz时,测量到的插入损耗为3.5 dB,回波损耗优于-10 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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