Improved DMA Algorithm for the PXIE Bus

Abstract

The PXIE bus is a PCIE bus in industrial expansion. In order to avoid the influence of excessive interaction between PC and hardware during PXIE transmission on the transmission bandwidth, a new design of PXIE bus DMA is proposed. This design is based on a dynamically spliced DMA scheduling method. By combining adjacent memory areas The way the request is accessed reduces the number of PC-to-hardware interactions and interrupt requests. Compared with the traditional DMA transfer, the use of the DMA transfer, transmission bandwidth and transmission speed have been well improved.