A Fault Injection Framework for AI Hardware Accelerators

Salvatore Pappalardo, A. Ruospo, Ian O’Connor, B. Deveautour, Ernesto Sánchez, A. Bosio
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Abstract

Deep Neural Networks (DNNs) have proven to give very good results for many complex tasks and applications, such as object recognition in images/videos and natural language processing. Some relevant applications of DNNs are defined by real-time safety-critical systems, which typically require the adoption of DNN accelerators that are usually implemented as systolic arrays. Assessing their reliability is not trivial and may depend on several factors such as the size of the array and the data precision. In this paper, we present a cross-layer framework for systolic array DNN accelerators described at RTL level allowing to inject faults at channel granularity for convolutional layers. The basic idea is to simulate the execution of the Channel Under Test (ChUT) at RTL level. Faulty outputs collected from the RTL simulation are then used at software level to complete the execution of the DNN and thus determine the impact of the injected faults at application level. Interestingly, the software execution is more than 100 times faster than the corresponding hardware simulation.
人工智能硬件加速器的故障注入框架
深度神经网络(dnn)已被证明在许多复杂的任务和应用中具有非常好的效果,例如图像/视频中的对象识别和自然语言处理。深度神经网络的一些相关应用是由实时安全关键系统定义的,这通常需要采用通常作为收缩阵列实现的深度神经网络加速器。评估它们的可靠性并非易事,可能取决于几个因素,如数组的大小和数据精度。在本文中,我们提出了一个在RTL级别描述的收缩阵列DNN加速器的跨层框架,允许在卷积层的通道粒度上注入故障。基本思想是在RTL级别模拟被测通道(ChUT)的执行。然后在软件级别使用从RTL模拟收集的错误输出来完成DNN的执行,从而确定在应用级别注入的错误的影响。有趣的是,软件的执行速度比相应的硬件模拟快100倍以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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