E. Borin, F. Klein, N. Moreano, R. Azevedo, G. Araújo
{"title":"Fast instruction set customization","authors":"E. Borin, F. Klein, N. Moreano, R. Azevedo, G. Araújo","doi":"10.1109/ESTMED.2004.1359704","DOIUrl":null,"url":null,"abstract":"This work proposes an approach to tune embedded processor datapaths toward a specific application, so as to maximize the application performance. We customize the computation capabilities of a base processor, by extending its instruction set to include custom operations which are implemented as new specialized functional units. We describe an automatic methodology to select the custom instructions from the given application code, in a way that there is no need of compensation code or other modifications in the application, simplifying the code generation. By using the ArchC architecture description language, fast compilation and simulation of the resulting customized processor code are achieved, considerably reducing the turnaround time required to evaluate the best set of custom operations. Experimental results show that our framework provides large performance improvements (up to 3.6 times), when compared to the base general-purpose processor, while significantly speeding up the design process.","PeriodicalId":178984,"journal":{"name":"2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004.","volume":"184 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2nd Workshop onEmbedded Systems for Real-Time Multimedia, 2004. ESTImedia 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTMED.2004.1359704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This work proposes an approach to tune embedded processor datapaths toward a specific application, so as to maximize the application performance. We customize the computation capabilities of a base processor, by extending its instruction set to include custom operations which are implemented as new specialized functional units. We describe an automatic methodology to select the custom instructions from the given application code, in a way that there is no need of compensation code or other modifications in the application, simplifying the code generation. By using the ArchC architecture description language, fast compilation and simulation of the resulting customized processor code are achieved, considerably reducing the turnaround time required to evaluate the best set of custom operations. Experimental results show that our framework provides large performance improvements (up to 3.6 times), when compared to the base general-purpose processor, while significantly speeding up the design process.