{"title":"Implementation of CASPAR Firmware Interface on PYNQ-Z2","authors":"X. Duan, Jian Li, X. Pei, T. Ergesh, Zhi-Qun Wen, Mao-zheng Chen","doi":"10.1109/MAPE53743.2022.9935197","DOIUrl":null,"url":null,"abstract":"We proposed a new efficient and flexible FPGA design method for the PYNQ-Z2 platform. The CASPER firmware interface is developed based on the PYNQ-Z2, and the FPGA firmware programs are designed using the CASPER toolflow. We used the PYNQ system to create a TCP service for communication with the CASPER library to enable remote real-time interaction, configuration, program loading and data reading from the hardware platform. The performance of the implemented CASPER platform is verified by designing firmware programs for GPIO, software registers, FIR digital filters and related experiments. The implemented approach provides rich development resources for FPGA development, shortens development cycle, improves development efficiency, and greatly simplifies the FPGA firmware design flow through platform-independent hardware and software.","PeriodicalId":442568,"journal":{"name":"2022 IEEE 9th International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications (MAPE)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 9th International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications (MAPE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MAPE53743.2022.9935197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We proposed a new efficient and flexible FPGA design method for the PYNQ-Z2 platform. The CASPER firmware interface is developed based on the PYNQ-Z2, and the FPGA firmware programs are designed using the CASPER toolflow. We used the PYNQ system to create a TCP service for communication with the CASPER library to enable remote real-time interaction, configuration, program loading and data reading from the hardware platform. The performance of the implemented CASPER platform is verified by designing firmware programs for GPIO, software registers, FIR digital filters and related experiments. The implemented approach provides rich development resources for FPGA development, shortens development cycle, improves development efficiency, and greatly simplifies the FPGA firmware design flow through platform-independent hardware and software.