P. Sastry, K. Dinh, P. Le, E. King, D. Wenzbauer, L. Cropper, H. Shumway, W. Breinholt, P. Lubeck, D. Brahmbhatt, M. Gill
{"title":"A Synchronous 1Mb (64k X 16) Burst EPROM","authors":"P. Sastry, K. Dinh, P. Le, E. King, D. Wenzbauer, L. Cropper, H. Shumway, W. Breinholt, P. Lubeck, D. Brahmbhatt, M. Gill","doi":"10.1109/NVMT.1993.696959","DOIUrl":null,"url":null,"abstract":"A new, high performance 1 Mb( 64K X 16 ) EPROM (NM27P6841) incorporating a synchronous, glueless interface to the Motorola 68040 and 68EC040 microprocessors, has been designed. The 90 ns initial access time and the 30 ns burst access time allow up to a 16 byte “burst” access in 4-1-11 bus cycles @ 33Mhz. This improves the bus bandwidth performance by 128% over high performance 8-bit EPROMs. In addition, it provides a system solution at a cost lower than “SRAM shadowing” used in the past.","PeriodicalId":254731,"journal":{"name":"[1993 Proceedings] Fifth Biennial Nonvolatile Memory Technology Review","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1993 Proceedings] Fifth Biennial Nonvolatile Memory Technology Review","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NVMT.1993.696959","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A new, high performance 1 Mb( 64K X 16 ) EPROM (NM27P6841) incorporating a synchronous, glueless interface to the Motorola 68040 and 68EC040 microprocessors, has been designed. The 90 ns initial access time and the 30 ns burst access time allow up to a 16 byte “burst” access in 4-1-11 bus cycles @ 33Mhz. This improves the bus bandwidth performance by 128% over high performance 8-bit EPROMs. In addition, it provides a system solution at a cost lower than “SRAM shadowing” used in the past.