The need for usable formal methods in verification and validation

Ross Gore, S. Diallo
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引用次数: 15

Abstract

The process of developing, verifying and validating models and simulations should be straightforward. Unfortunately, following conventional development approaches can render a model design that appeared complete and robust into an incomplete, incoherent and invalid simulation during implementation. An alternative approach is for subject matter experts (SMEs) to employ formal methods to describe their models. However, formal methods are rarely used in practice due to their intimidating syntax and semantics rooted in mathematics. In this paper we argue for a new approach to verification and validation that leverages two techniques from computer science: (1) model checking and (2) automated debugging. The proposed vision offers an initial path to replace conventional simulation verification and validation methods with new automated analyses that eventually will be able to yield feedback to SMEs in a familiar language.
在验证和确认中需要可用的形式化方法
开发、验证和验证模型和模拟的过程应该是直截了当的。不幸的是,遵循传统的开发方法可能会在实现过程中将看起来完整和健壮的模型设计呈现为不完整、不连贯和无效的模拟。另一种方法是主题专家(sme)使用正式的方法来描述他们的模型。然而,形式化方法在实践中很少使用,因为它们的语法和语义根植于数学。在本文中,我们提出了一种新的方法来验证和确认,它利用了计算机科学中的两种技术:(1)模型检查和(2)自动调试。提议的愿景提供了一条初始路径,用新的自动化分析取代传统的模拟验证和验证方法,最终将能够以熟悉的语言向中小企业提供反馈。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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