Testing of Switch Blocks in Three-Dimensional FPGA

Abstract

In recent years, programmable interconnects in Field Programmable Gate Arrays (FPGAs)become a bottleneck of improving performance. So, for improving performance of FPGAs, a design of programmable interconnects is a key element, and innovative routing architecture is being desired. From this viewpoint, three dimensional FPGAs (3D-FPGAs) were proposed and focused. 3D-FPGAs have multiple layers which connected by vertical wires through 3D- Switch Block (SB). The main difference between the structures of the traditional two dimensional (2D) FPGAs and 3D-FPGAs is in 3D-SBs, and thus parts in 3D-FPGAs other than the SBs can be tested using existing methods for 2D-FPGAs. However, 3D-SBs cannot be tested by traditional testing for 2D-FPGAs. This paper presents testing for 3D-SBs in 3D-FPGAs. The proposed testing can detect stuck-at, bridging, stuck-open and stuck-on faults on three-dimensional switch blocks, and requires five test configurations to detect these catastrophic faults.