Construction of analog library cells for analog/digital ASICs using novel design and modular assembly techniques

M. Smith, C. Anagnostopoulos, C. Portmann, R. Rao, P. Valdenaire, H. Ching
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引用次数: 3

Abstract

Efforts to improve the tools and techniques for designing an analog cell library for analog/digital VLSI design are described. The techniques presented allow an analog IC designer to construct a library for cell-based design, as opposed to direct compilation of a full-custom analog/digital IC. Using this approach, the problem of automation is made more tractable, and the result is a more robust, but still flexible, system for mixed analog/digital ASIC (application-specific integrated circuit) design. By combining a study of device scaling issues, careful choice of layout topologies, together with modular construction of cells using lambda based rules, it is possible to extend the lifetime of an analog cell library. Cells have been constructed for both 2- and 1.5-μm down-gate-width technologies with the ability to scale down to a 1-μm process
采用新颖设计和模块化组装技术构建模拟/数字asic的模拟库单元
本文描述了为模拟/数字VLSI设计改进模拟单元库设计工具和技术的努力。所提出的技术允许模拟IC设计人员为基于单元的设计构建一个库,而不是直接编译完全定制的模拟/数字IC。使用这种方法,自动化问题变得更容易处理,结果是一个更强大,但仍然灵活的混合模拟/数字ASIC(专用集成电路)设计系统。通过结合对设备缩放问题的研究,仔细选择布局拓扑,以及使用基于lambda规则的单元模块化构建,可以延长模拟单元库的使用寿命。目前已经为2 μm和1.5 μm的下栅极宽度技术构建了电池,并且能够缩小到1 μm的工艺
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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