Investigation of step-doped channel heterostructure field-effect transistor

Abstract

Two kinds of heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile have been fabricated and demonstrated. For the 1/spl times/100 /spl mu/m/sup 2/ gated dimension, the maximum drain saturation currents were 735 and 675 mA/mm, the maximum transconductances 200 and 232 mS/mm, the gate breakdown voltages 15 V and 12 V, and the wide gate voltage swing 3.3 and 2.6 V with transconductance g/sub m/ higher than 150 mS/mm. A simple model is employed to analyze the performance of threshold voltage V/sub T/ and values of -3.7 and -1.8 V are obtained. These good performances show that the SDCFET has a good potential for high-speed, high-power circuit applications.