CMOS RF LNA with high ESD immunity

Abstract

We present a two-stage LNA design with a high ESD immunity. We use a common-gate amplifier as an input stage for our design. The RF input is directly connected to the source of the transistor, which will provide a higher ESD protection than conventional common-source amplifiers. The two-stage LNA is designed to operate at 1.8 GHz with a voltage supply of 1.5 V using AMS 0.35-/spl mu/m CMOS technology. The new LNA has a measured power gain of 14.1 dB with a noise figure of 5 dB. The reverse isolation is -32 dB, and the output-referred third-order intercept point is 6.3 dBm. The measured HBM ESD withstand voltages are 1.5kV and -3.5kV.