Energy Investigation of Microprocessor Addressing Modes - Towards Full System Energy Exploration

Abstract

The following paper presents measurement results of energy consumption of microprocessor instructions from operand addressing mode’s point of view. Previous work of the authors showed an Instruction Set Simulator (ISS) energy model that contained Dynamic Frequency Scaling (DFS) and memory domain information but lacked target address simulation. Measurements showed that different addressing modes may lead to different base energy cost of an instruction which might lead to simulation inaccuracy.