Trellis-coded 8-PSK scheme combined with turbo and single-parity-check product codes

Abstract

We examine a trellis-coded 8-PSK scheme that uses a concatenated code consisting of a rate 2/3, 8-state turbo code (an inner code) and a single-parity-check product code (an outer code). Monte Carlo simulation shows that the concatenated code performs better than turbo code alone. When a turbo interleaver of 4096/spl times/2 bits is used, the Eb/No to obtain a frame-error rate of 10/sup -3/ is about 3.6 dB for the concatenated code, about 3.8 dB for the turbo code alone with an S-random interleaver (S=47), and more than 4.4 dB for the turbo code alone with a random interleaver. In the high signal-to-noise ratios region, a lower bit-error rate is observed with the concatenated code than with the turbo code alone. A concatenated code using a double-iterated decoding system will thus improve the BER and FER of turbo codes.