Performance Comparisons of Multilevel Inverter Topologies

Abstract

Applications of multilevel inverters are increasing day by day due to their capability to operate for higher voltage with less harmonic components at output terminals. The Neutral Point Clamped (NPC) and Cascaded H-Bridge (CHB) inverters are two well-known multilevel inverter topologies that are used as traditional converters. Different methods of producing pulses to activate semiconductor switches in multilevel inverters are used to minimize harmonics. Pulse Width Modulation (PWM) methodologies for multilevel inverters are introducing every day to make system more applicable. Among many, a Sinusoidal PWM (SPWM) technique is a popular method for generating pulses to switches. Compared to NPC, the structure of CHB is simple and having more futures. However, for a higher level, number of switches of inverter goes increase. Hence, asymmetrical CHB configuration is implemented with a smaller number of switches for higher levels. Various multilevel topologies with suitable SPWM methods are proposed in this paper. For analysis of proposed configuration, five and fifteen level inverters of CHB configuration is presented with phase and line voltages. Extensive results are presented in this paper with the help of MATLAB/Simulink package.