VFSMC - a core for cycle accurate multithreaded processing in hard real-time Systems-on-Chip

Abstract

This paper focuses on the design, implementation and benchmarking of a core for cycle accurate multithreaded processing in hard real-time systems-on-chip. The reason to force this development is the increasing number of system-on-chip applications which require hard real-time or even cycle accurate execution of parallel tasks. Benchmarks show that the core presented in this work overcomes these barriers by implementing a well defined instruction set and an execution pipeline which allows fine-grain temporal multithreading.