{"title":"Physical Bridge Design for High Performance to Peripheral Bus: An Open Source Approach","authors":"Arjun Suresh, Somesh Nandi","doi":"10.1109/ICAECC50550.2020.9339522","DOIUrl":null,"url":null,"abstract":"The Advanced Microcontroller Bus Architecture (AMBA) offering from ARM is one of the most widely used standards for System on Chip (SoC) design in the semiconductor industry. The specifications defined by AMBA provide many advantages such as right-first-time development and technology independence for design of high performance chipsets. The main focus in this paper is on two protocols - Advanced Highperformance Bus (AHB) and Advanced peripheral Bus (APB). Keeping in mind that these specifications are an open standard, we aim to develop an AMBA AHB-APB bridge from Register Transfer Level (RTL) to Graphical Display System (GDSII) using only open source tools and libraries. The proposed design is developed with Verilog Hardware Definition Language (HDL), followed by compilation and functional simulation. Physical design is performed after verification to obtain graphical display of the bridge module. Detailed analysis of the results obtained indicates that open source options are viable to test various digital designs obviating the need to invest in expensive proprietary design tools. This would accrue benefit by greatly improving the scope and reach of Very Large Scale Integration (VLSI) design.","PeriodicalId":196343,"journal":{"name":"2020 Third International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 Third International Conference on Advances in Electronics, Computers and Communications (ICAECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAECC50550.2020.9339522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The Advanced Microcontroller Bus Architecture (AMBA) offering from ARM is one of the most widely used standards for System on Chip (SoC) design in the semiconductor industry. The specifications defined by AMBA provide many advantages such as right-first-time development and technology independence for design of high performance chipsets. The main focus in this paper is on two protocols - Advanced Highperformance Bus (AHB) and Advanced peripheral Bus (APB). Keeping in mind that these specifications are an open standard, we aim to develop an AMBA AHB-APB bridge from Register Transfer Level (RTL) to Graphical Display System (GDSII) using only open source tools and libraries. The proposed design is developed with Verilog Hardware Definition Language (HDL), followed by compilation and functional simulation. Physical design is performed after verification to obtain graphical display of the bridge module. Detailed analysis of the results obtained indicates that open source options are viable to test various digital designs obviating the need to invest in expensive proprietary design tools. This would accrue benefit by greatly improving the scope and reach of Very Large Scale Integration (VLSI) design.