A control architecture for a centralized multi-master-slave processor system

Abstract

A major problem in distributing computer power over a number of processors is to control the flow of the processes in the system by scheduling the processes on the correct processors and providing the interprocess communication needed. An alternative to implementing control functions in software is to micro-program them in the hardware. This alternative becomes even more attractive if a set of standard control functions can be defined without a lot of special cases that must be programmed in a unique way.